1. Field of the Invention
The present invention relates to a semiconductor memory circuit including a non-volatile memory.
2. Description of the Related Art
Some semiconductor circuit devices have a resistor voltage divider circuit for adjustment. Commonly-used examples include a voltage detection circuit device generally called “voltage detector”. The voltage detection circuit device is made up of a reference voltage, an amplifier, a resistor voltage divider circuit, and an output transistor, and is configured to output “High” or “Low” depending on whether a voltage is higher or lower than a predetermined detection voltage value. When the circuit is manufactured by a semiconductor wafer process, the reference voltage fluctuates because of fluctuations in the manufacturing process. To deal with this problem, the resistor voltage divider circuit is designed to have an arbitrary voltage dividing ratio by adjustment so that the detection voltage value can be set to a constant value. Since the detection voltage value can be controlled by controlling the voltage dividing ratio of the resistor voltage divider circuit, it is advantageous for obtaining an arbitrary detection voltage value easily.
A widely-used method for adjusting the voltage dividing ratio of the resistor voltage divider circuit is a trimming fuse. A fuse is arranged in parallel to each of a large number of resistors constituting the resistor voltage divider circuit, and trimming is performed by cutting the fuse by laser. The resistor connected in parallel to an uncut fuse does not function as a resistor because the fuse is short-circuited. The resistor connected in parallel to a cut fuse functions as a resistor because the fuse is cut, that is, the fuse is in the OPEN state.
As another method, an electrically writable EPROM is often used. A transistor is arranged in parallel to a resistor, and trimming is performed by turning ON or OFF the parallel-arranged transistor based on information stored in the EPROM. The EPROM is advantageous in that electrical writing is possible even after the assembly into a package or onto a board. In the case of the fuse, the trimming needs to be performed before the package assembly because laser irradiation is necessary.
Next, a further description is given of the EPROM. There are various types of EPROMs, but a commonly-used one employs a MOS transistor structure having a floating gate, which stores data of 1 or 0 by utilizing a phenomenon that a threshold voltage VT changes depending on electric charges accumulated in the floating gate. In the following, the EPROM refers to this structure.
Typical requirements for the use of the EPROM include being low in current consumption, free from data corruption, and small in circuit area.
In many cases, data is written into the EPROM by utilizing so-called hot-carrier injection, which is the phenomenon that electric charges flowing between a source and a drain become hot carriers when a high voltage is applied between the source and the drain. The feature of this writing method resides in that the high voltage is applied between the source and the drain.
In this method, if a certain level of voltage is applied to the drain at the time of reading or holding data, data may be written also in the reading or holding of data. To deal with this problem, the measure as disclosed in Japanese Patent Application Laid-open No. H07-122090 has been proposed. The feature resides in that a voltage is applied to the EPROM to cause a current to flow for a moment so as to read data, and the data is stored in a latch circuit. Because the latch circuit continues to store the data in a period during which the power source is turned ON, it is possible to apply the voltage to the EPROM only upon turning ON the power source and not to apply the voltage thereafter. Consequently, the chance of corruption of the stored data of the EPROM can be reduced to improve the reliability.
Next, an introduction is given to Japanese Patent Application Laid-open No. 2003-257186. As disclosed therein, two EPROMs are arranged in series and configured so that one of the EPROMs is turned ON while the other is turned OFF. No current flows between power sources because one of the EPROMs is turned OFF. The circuit configuration is simple as compared with Japanese Patent Application Laid-open No. H07-122090, and results in a merit of a small occupation area.
The method described in Japanese Patent Application Laid-open No. H07-122090 and illustrated in FIG. 17 as a conventional example has the problem in reading data to the latch circuit. As described in Japanese Patent Application Laid-open No. 2003-257186, the problem occurs particularly in reading immediately after a power supply voltage is turned ON. When the method is applied to the voltage detector described in the “Description of the Related Art” section, the problem is particularly liable to occur because a terminal for the power supply voltage and a terminal for detecting a voltage are shared in many cases and the power supply voltage itself is unstable.
Japanese Patent Application Laid-open No. 2003-257186 can avoid the problem relating to the latch circuit, but has a problem in that a drain voltage of one of the EPROMs becomes higher and hence a small degree of writing proceeds little by little to cause corruption of data of the EPROM.
It is apparent for the voltage detector to desirably have a wide allowable range of the detection voltage. For example, in the case of a voltage detector designed to switch the output between 1 and 0 at a detection voltage of 5 V, the product competitive power is higher when a voltage allowed to be applied to the detection terminal is 1 V to 10 V than 4 V to 6 V. Because the power supply voltage terminal and the voltage detection terminal are often shared as described above, it is required to have a wide allowable range of the power supply voltage. Accordingly, it is required to be free from data corruption even at a high power supply voltage. In the method of Japanese Patent Application Laid-open No. 2003-257186, the problem of data corruption of the EPROM becomes conspicuous because the electric charges are easily injected into the floating gate of the turned-OFF EPROM as the power supply voltage becomes higher.
The trimming circuit using the EPROM is used in some fields today, but is not used in other fields because of the above-mentioned problem.